BEC701

VLSI Design

L-T-P3-0-0 Credits3 Session2025-26 TypeTheory
Appears in 3 semesters · 3 branches

B.Tech Electronics & Communication Engineering · Sem 7 (Core) · B.Tech ECE (Advanced Communication Technology) · Sem 7 (Core) · B.Tech Electronics Engineering (VLSI Design & Technology) · Sem 7 (Core)

Syllabus

5 units · 40 lecture hours
Unit1

Unit 1: Introduction

8 hrs

VLSI Design flow, general design methodologies; critical path and worst-case timing analysis, overview of design hierarchy, layers of abstraction, integration density and Moore's law, VLSI design styles, packaging, CMOS Logic, Propagation Delay definitions, sheet resistance.

Unit2

Unit 2: Interconnect Parameters

8 hrs

Resistance, Inductance, and Capacitance, skin effect and its influence, lumped RC Model, the distributed RC Model, transient Response, RC delay model, Linear Delay Model, Logical Effort of Paths, Scaling.

Unit3

Unit 3: Dynamic CMOS design

8 hrs

steady-state behavior of dynamic gate circuits, noise considerations in dynamic design, charge sharing, cascading dynamic gates, domino logic, np-CMOS logic, problems in single-phase clocking, two-phase non-overlapping clocking scheme, Sequential CMOS Logic Circuits, Layout design.

Unit4

Unit 4: Semiconductor Memories

8 hrs

Dynamic Random Access Memories (DRAM), Static RAM, non-volatile memories, flash memories, Pipeline Architecture. Low – Power CMOS Logic Circuits: Introduction, Overview of Power Consumption, Low – Power Design through voltage scaling,

Unit5

Unit 5: Introduction to Testing

8 hrs

Faults in digital circuits. Modeling of faults, Functional Modeling at the Logic Level, Functional Modeling at the Register, Structural Model and Level of Modeling. Design for Testability, Ad Hoc Design for Testability Techniques, Controllability and Observability, Introduction to Built-in-self-test (BIST) Concept.

Course Outcomes (COs)5 outcomes

After completion of the course student will be able to:

  1. CO1Express the concept of VLSI design and CMOS circuits and delay study.
  2. CO2Analyze mathematical methods and circuit analysis models in analysis of CMOS digital electronics circuits.
  3. CO3Design and analyze various combinational & sequential circuits based on CMOS technology.
  4. CO4Examine power logic circuits and different semiconductor memories used in present day technology.
  5. CO5Interpret faults in digital circuits, Fault Models and various Testing Methodologies.

Text Book

  1. Sung-Mo Kang & Yosuf Leblebici, “CMOS Digital Integrated Circuits: Analysis & Design”,Mcgraw Hill, 4th Edition.
  2. Neil H.E.Weste, David Money Harris, “CMOS VLSI Design – A circuits and Systems Perspective” Pearson, 4th Edition.
  3. D. A. Pucknell and K. Eshraghian, “Basic VLSI Design: Systems and Circuits”, PHI, 3rd Ed.,1994.

Reference Books

  1. R. J. Baker, H. W. Li, and D. E. Boyce , " CMOS circuit design, layout, and simulation", Wiley- IEEE Press,2007.
  2. M. Abramovici, M.A. Breuer and A.D. Friedman, "Digital Systems and Testable Design" , Jaico Publishing House.

Official AKTU syllabus

This subject is on page 5 of the original AKTU PDF.

Official AKTU syllabus PDF ↗