Digital System Design

Number Systems, Binary arithmetic, signed magnitude representation, Binary codes, code conversion, review of Boolean algebra and Demorgans theorem, SOP & POS forms, Canonical forms, Karnaugh maps up to 5 variables, tabulation method.

Analysis and Design of combinational circuits, MSI devices like comparators, multiplexers, demultiplexers, encoder, decoder, circuit realization using Multiplexers and decoders, half and full adders, subtractors, serial and parallel adders, BCD adder, barrel shifter and ALU.

Building blocks like S-R, JK and Master-Slave JK FF, D FF, T FF, edge triggered FF, Flip flop conversion, Applications of Flip Flops: ripple and synchronous counters, Ring counter, Johnson counter, shift registers: SISO, SIPO, PISO, PIPO, Bidirectional shift register, Universal shift register; Finite state machines: Mealy and Moore machines, State diagrams, state reduction, Analysis of clocked sequential circuits, Design of clocked sequential circuits.

TTL NAND gate, specifications, noise margin, propagation delay, fan-in, fan-out, tristate TTL, ECL, CMOS families and their interfacing, memory elements, concept of programmable logic devices such as FPGA, Verilog RTL coding of combinational and sequential elements, and logic implementation using programmable devices (Siemens EDA Precision RTL / Cadence Genus / Synopsys Design Compiler).

Specifications of DACs, Weighted resistor, R-2R ladder, Analog-to-digital converters (ADC): Specifications of ADCs, principle of ADC, switched capacitor circuits: Basic concept, practical configurations, ADC etc. ADC Types: dual slope, successive approximation, counting type, flash etc. Note: As mentioned above any ONE of the three EDA tools may be made use of depending upon the availability. The questions asked in exam will not be from any specific EDA tool and will be of generic nature.